Parallel Computation & Applications M.Tech Model Question Paper : mgu.ac.in

Name of the University : Mahatma Gandhi University
Department : Computer Science and Engineering
Degree : M.Tech
Subject Code/Name : MCSCS 206.2/Parallel Computation And Applications
Sem : II
Website : mgu.ac.in
Document Type : Model Question Paper

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I : https://www.pdfquestion.in/uploads/mgu.ac.in/5270-1-MCSCS%20206_2%20Parallel%20Computation%20and%20Applications%20-set1.doc
II : https://www.pdfquestion.in/uploads/mgu.ac.in/5270-2-MCSCS%20206_2%20Parallel%20Computation%20and%20Applications%20-set2.doc

Parallel Computation & Applications Question Paper :

M.TECH. Degree Examination :
Branch: Computer Science and Engineering
Specialization : Computer Science and Engineering

Related : MGU MCSCS203/MCSIS203 Computer Security & Applied Cryptography M.Tech Model Question Paper : www.pdfquestion.in/5277.html

Model Question Paper – II :
Second Semester :
MCSCS 206.2 Parallel Computation And Applications :
(Elective IV)
(Regular – 2011 Admission onwards)
Time: 3hrs \
Maximum:100 marks

Answer the following Questions. :
1. a) Explain about architectural parallelism? (8)
b) Explain about the architectural classification schemes? (8)
c) Write short note on speedup and efficiency of parallel algorithms? (9)
or

2. a) Explain various kinds of parallel architectures? (8)
b) Explain about various interconnection networks? (8)
c) Explain various applications of architectural Parallelism? (9)

3. a) Explain about mesh connected ILLIAC network? (8)
b) Explain about multi threading? (8)
c) Explain about pipelined MIMD processors? (9)
or

4. a) Explain about SIMD array processors? (8)
b) Compare shared memory and message passing architecture? (8)
c) Compare static and dynamic interconnection networks? (9)

5. a) Explain about multiprocessor interconnection structure? (8)
b)Explain UMA multi processor? (8)
c) Explain about cross bar switches? (9)
or
6. a) Explain about Cross bar switch and multiport memories? (8)
b) Explain about Cross bar switch and multiport memories? (8)
c) Explain NUMA multi processor? (9)

7. a) Explain about data flow architecture? (8)
b) Explain synchronization and data sharing? (8)
c) Explain about mutual exclusion using atomic read and write? (9)
or
8. a) Explain how compiler optimization is done to achieve parallelism in codes? (8)
b) Explain how synchronizing different kinds of cooperative computations? (8)
c) Explain about data flow principle? (9)

Model Question Paper – I :
Second Semester :
Answer the following Questions. :
1. a) Explain about architectural parallelism?(8)
b) Explain about various interconnection networks? (8)
c) Explain about the parallelism in algorithms? (9)
or
2. a) Explain various kinds of parallel architectures? (8)
b) Explain about the architectural classification schemes? (8)
c) Explain about the architecture of various interconnection networks? (9)

3. a) Explain about SIMD array processors? (8)
b) Explain about mesh connected ILLIAC network? (8)
c) Explain about shared memory architecture? (9)
or
4. a) Explain about multi threading? (8)
b) Explain about message passing architecture? (8)
c) Explain about SIMD various static and dynamic inter Connection Networks? (9)

5. a) Explain about Cross bar switch and multiport memories? (8)
b)Explain UMA multi processor? (8)
c) Explain about cross bar switches? (9)
or
6. a) Explain about multiprocessor interconnection structure? (8)
b) Explain about multistage networks? (8)
c) Explain NUMA multi processor? (9)

7. a) Explain how compiler optimization is done to achieve parallelism in codes? (8)
b) Explain how synchronizing different kinds of cooperative computations? (8)
c) Explain about mutual exclusion using atomic read and write? (9)
or
8. a) Explain about data flow architectures? (8)
b) Explain synchronization and data sharing? (8)
c) Explain about data flow principles? (9)

M.Tech. Degree Examination :
Branch : Computer Science and Engineering
Specialization : Computer Science and Engineering
Model Question Paper – I
Second Semester
MCSCS 206.1 MULTICORE ARCHITECTURE (Elective IV) (Regular – 2011 Admission onwards)
Time : 3hrs
Maximum : 100 marks

Answer the following Questions :
1. a) Differentiate Hardware versus Software Speculation?(7)
b) Explain using of ILP to Exploit Thread Level Parallelism? (8)
c) Explain Dynamic Scheduling with Tomasulo Algorithm? (10)
or
2. a) Differentiate Multicore Versus Multithreading? (8)
b) How branch costs are reduced with Prediction? (8)
c) What are the limitations of ILP?(9)

3. a) Explain how protection is provided in virtual memory? (6)
b) Differentiate symmetric shared memory architecture and distributed shared memory architecture? (7)
c) Describe six basic cache optimization techniques? (12)
or
4. a) What are the techniques for fast address translation in virtual memory? (8)
b) What is symmetric shared memory architecture? Explain the performance of symmetric shared memory architecture? (8)
c) Describe the design of memory hierarchies? (9)

5. a) What is multiprocessor cache coherence problem? (8)
b) Describe multilevel cache hierarchies? (8)
c) Explain the synchronization mechanism for multiprocessors? (9)
or
6. a) What are the design challenges of directory based protocols? (8)
b) Explain Split transaction bus with multilevel caches? (8)
c) Describe snooping protocols with example protocols? (9)

7. a) Explain PowerPC Memory management system? (8)
b) Describe interconnection topologies? (7)
c) Give a description to Cell Broadband Engine? (10)
or
8. a) Explain Synergistic processing element? (7)
b) Explain the flow control mechanism in interconnection networks? (8)
c) Describe in detail the IBM Power 6 Architecture? (10)