Name of the College : Mahatma Gandhi University
Department : Computer Science and Engineering
Subject Code/Name : MCSIS 105-1/HIGH PERFORMANCE SYSTEM ARCHITECTURE
Sem : I
Website : mgu.ac.in
Document Type : Model Question Paper
Download Model/Sample Question Paper :
I : https://www.pdfquestion.in/uploads/mgu.ac.in/5021-1-MCSIS%20105-1%20HPSA-Set%201.doc
II : https://www.pdfquestion.in/uploads/mgu.ac.in/5021-2-MCSIS%20105-1%20HPSA-Set%202.doc
High Performance System Architecture :
M.TECH. DEGREE EXAMINATION, December 2013 :
Branch: Computer Science Engineering
Specialization: Information Systems
Related : MGU MCSIS103 Compiler Design M.Tech Model Question Paper : www.pdfquestion.in/5020.html
Model Question Paper – II
First Semester :
MCSIS 105-1 : HIGH PERFORMANCE SYSTEM ARCHITECTURE
(Regular – 2013 Admissions)
Time: Three Hours
Maximum: 100 marks
Answer all questions. :
Any data, if required may be suitably assumed and clearly indicated. :
1. a. Briefly explain IBM cell architecture. (15 marks)
b. Explain fine grain and coarse grain multi-threading. (10 marks) OR
2. a. Explain Uniform Memory Access and Non-Uniform Memory Access. (15 marks)
b. Explain CMP architecture. What are the advantages of CMP architecture over traditional architectures? (10 marks)
3. a. Explain false sharing. (5 marks)
b. What is meant by many-core architecture? Explain network contention in many-core architectures. How does it affect the performance of the system? (20 marks)
OR
4.a. Explain strong and weak scaling. (8 marks)
b. Explain mixed mode OpenMP/MPI. What are the advantages of OpenMP/MPI Programming? (17 marks)
5. a. Explain the registers in Y86 architecture. (8 marks)
b. Explain various arithmetic and logical instructions in Y86. (17 marks)
OR
6. a. With the help of an example, explain CUDA Kernel. Explain briefly how CUDA kernel is executed. (18 marks)
b. Explain shared memory and constant memory. (7 marks)
7. a. Explain the effects of context switching on the measurement of time? (7 marks)
b. Explain the measurement of time using cycle counters. (18 marks)
OR
8. a. Explain the K-Best measurement scheme. (15 marks)
b. What is meant by a Thread? Explain thread execution model. (10 marks)
MCSIS 105-1
HIGH PERFORMANCE SYSTEM ARCHITECTURE :
(Regular – 2013 Admissions)
Time: Three Hours
Maximum: 100 marks
Answer all questions. :
Any data, if required may be suitably assumed and clearly indicated. :
1. a. Discuss symmetric and distributed shared memory architectures. (15 marks)
b. Define hardware and software multi threading. Explain the advantages of both. (10 marks)
OR
2. a. Explain simultaneous multi-threading. What are the design challenges of simultaneous multi- threading? (15 marks)
b. Explain multi-core processors. Discuss different types of multi-core processors. (10 marks)
3. a. State and explain Amdahl’s law. What is the relevance of Amdahl’s law in high performance computing? (13 marks)
b. Discuss the methods that can be adopted for reducing the network contention in many-core architectures. (12 marks)
OR
4. a. Explain sections directive in OpenMP with an example. (15 marks)
b. Should the number of threads and the number of Sections be same? What will happen if they differ in number? Which thread will execute which section? (10 marks)
5. a. Explain Y86 processor state and instruction set architecture. (15 marks)
b. Explain the data transfer instructions in Y86. (10 marks)
OR
6. a. Explain the CUDA memory model. (18 marks)
b. What is OpenCL? Explain the features of OpenCL. (7 marks)
7. a. Explain the process of measuring time by Interval Counting. (17 marks)
c. Explain flow of time from the perspective of an application program. (8 marks)
OR
8. a. Discuss concurrent programming with processes and concurrent programming with threads. (18 marks)
b. Explain the effects of caching and branch prediction on the measurement of time? (7 marks)
Syllabus :
Module 1 :
Introduction To Multiprocessors : Parallel computer models – Symmetric and distributed shared memory architectures – Performance Issues. Multi-core Architectures – Software and hardware multi threading SMT and CMP architectures Design issues Case studies- Intel Multi-core architecture. SUN CMP architecture. IBM cell processor. NVIDIA GPU. AMD APU.
Module 2 :
Shared Memory Programming : The Open MP standard. Parallelisation using compiler directives. Threading and variable types. Loop and sections constructs. Program correctness and reproducibility. Scheduling and false sharing as factors influencing performance.
Multi threaded Application Development : Algorithms, program development and performance tuning. Limitations to parallel performance : Strong vs weak scaling. Amdahl’s law. Network contention in modern many-core architectures. Mixed mode Open MP+MPI programming