Name of the College : Valliammai Engineering College
Subject : Digital Logic Circuits
Website : valliammai.co.in
Document Type : Question Bank
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Valliammai Digital Logic Circuit Question Paper
YEAR/SEMESTER:II/III ACADEMIC YEAR:2014-2015
UNIT 1
NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES
Related : Valliammai Engineering College MA7158 Applied Mathematics Communication Engineers M.E Question Bank : www.pdfquestion.in/2789.html
PART A
1. Briefly explain the stream lined method of converting binary to decimal number with example.
2. Give the Gray code for the binary number (111)2
3. When can RTL be used to represent digital systems? .
4. State the important characteristics of TTL family.
5. What weight does the digit 5 have in each of the following decimal number?
(a)1530 (b)1.059(c)3258(d)567.
6. Convert following hexadecimal number to decimal number.
(a)F2816 (b) BC2
7. Convert following decimal number to hexadecimal.
(a)1259(b)5768. 16
8. Convert (a)10010011101011012 (b)10010001011.001011102
9. Convert 3576to hexadecimal. 8
10. Classify the logic family by operation to hexadecimal.
11. List the advantages of ECL as compared to TTL logic family.
12. Classify the basic families that belong to the bipolar families and to the MOS families.
Ans: logic families: Bipolar MOS Bipolar: TTL DTL RTL ECL MOS: CMOS NMOS PMOS
13. Which is faster TTL or ECL? Which requires more power to operate?
14. Define noise margin.
15. Define Fan-out?
16. Define power dissipation?
17. What is propagation delay?
18. Define fan in?
19. Mention the classification of saturated bipolar logic families.
20. What are the types of TTL logic?
21. Express a 15 bit hamming code in general.
PART B
1. Discuss about TTL parameters.
2. Draw and explain the circuit diagram of CMOS NOR gate.
3. Name and explain the characteristics of TTL family.
4. Explain the characteristics and implementation of the following digital logic families.
(a) CMOS (b) ECL (c) TTL
5. Describe the concept working and applications of the following memories:
(a)PLD(b)FPGA(c)EPROM
6. Explain the classifications of binary codes.
7. Explain about error detection and correction codes
SYNCHRONOUS SEQUENTIAL CIRCUITS
UNIT 3
PART A
1. What are the classification of sequential circuits?
2. Define Flip flop.
3. What are the different types of flip-flop?
4. What is the operation of D flip-flop?
5. What is the operation of JK flip-flop?
6. What is the operation of T flip-flop?
7. Define race around condition.
8. What is edge-triggered flip-flop?
9. What is a master-slave flip-flop?
10. Define rise time.
11. Define fall time.
12. Define skew and clock skew.
13. Define setup time.
14. Define hold time.
15. Define propagation delay.
16. Define registers.
17. Define sequential circuit?
18. Give the comparison between combinational circuits and sequential circuits.
19. What do you mean by present state?
20. What do you mean by next state?
21. State the types of sequential circuits?
22. Define synchronous sequential circuit 1. A sequential circuit has 2D ff’s A and B an input x and output y is specified by the following next state and output equations.
PART B
a. A (t+1)= Ax + Bx b. B (t+1)= A’x c. Y= (A+B) x’
(i) Draw the logic diagram of the circuit. (ii) Derive the state table. (iii) Derive the state diagram.
2. Design a mod-10 synchronous counter using Jk ff. write excitation table and state table.
3. a) Write the excitation tables of SR, JK, D, and T Flip flops (b) Realize D and T flip flops using Jk flip flops
4. Design a sequential circuit using JK flip-flop for the following state table [use state diagram]
5. Design a counter with the following repeated binary sequence:0, 1, 2, 3, 4, 5, 6.use JK Flip-flop.
6. Design a 3 bit synchronous gray code counter using flip flop.
7. Draw and explain the block diagram of Mealy circuit.
8. Using positive edge triggering SR flip-flops design a counter which counts in the following sequence: 000,111,110,101,100,011,010,001,000,…
ASYNCHRONOUS SEQUENTIAL CIRCUITS
UNIT 4 – PROGRAMMABLE LOGIC DEVICES
PARTA
1. Define Asynchronous sequential circuit?
2. Give the comparison between synchronous & Asynchronous sequential circuits?
3. The following wave forms are applied to the inputs of SR latch. Determine the Q waveform Assume initially Q = 1 4.
4. What is race around condition? 5. Give the comparison between synchronous & Asynchronous counters.
6. The t pd for each flip-flop is 50 ns. Determine the maximum operating frequency for MOD – 32 ripple counter
7. What are secondary variables?
8. What are excitation variables?
9. What is fundamental mode sequential circuit?
10. What are pulse mode circuit?
11. What are the significance of state assignment?
12. When do race condition occur?
13. What is non critical race?
14. What is critical race?
15. When does a cycle occur?
16. What are the different techniques used in state assignment?
17. What are the steps for the design of asynchronous sequential circuit?
18. What is hazard? 19. What is static 1 hazard?
20. What is static 0 hazard?
21. What is dynamic hazard?
22. What is the cause for essential hazards?
23. What is flow table?
24. . What is primitive flow chart?
25. What is combinational circuit?
26. Define merger graph.
27. Define closed covering.
28. Define state table.
29. Define total state
30. What are the steps for the design of asynchronous sequential circuit?
31. Define primitive flow table.
32. What are the types of asynchronous circuits?
33. Give the comparison between state Assignment Synchronous circuit and state assignment asynchronous circuit.
34. What are races? 35. Define non critical race. 36. Define critical race?
37. What is a cycle?
38. Write a short note on fundamental mode asynchronous circuit.
39. Write a short note on pulse mode circuit.
40. Define secondary variables.
41. Define flow table in asynchronous sequential circuit.
42. What is fundamental mode.
43. Write short note on shared row state assignment.
44. Write short note on one hot state assignment.
45. A pulse mode asynchronous machine has two inputs. If produces an output whenever two consecutive pulses occur on one input line only. The output remains at 1 until a pulse has occurred on the other input line. Write down the state table for the machine.
46. What is programmable logic array? How it differs from ROM?
47. Explain EPROM.
48. Give the classification of PLD’s.
49. Define PROM. 50. Define PLA
51. Define PAL
52. Why was PAL developed ?
53. Why the input variables to a PAL are buffered
54. What does PAL 10L8 specify ?
55. Give the comparison between PROM and PLA.